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HCF40181B
4-BIT ARITHMETIC LOGIC UNIT
s
s
s
s s
s
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s s s
s s
FULL LOOK-AHEAD CARRY FOR SPEED OPERATIONS ON LONG WORDS GENERATES 16 LOGIC FUNCTIONS OF TWO BOOLEAN VARIABLES GENERATES 16 ARITHMETIC FUNCTIONS OF TWO 4-BIT BINARY WORDS A = B COMPARATOR OUTPUT AVAILABLE RIPPLE-CARRY INPUT AND OUTPUT AVAILABLE TYPICAL ADDITION TIME 200ns AT VDD = 10V STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"
SOP
ORDER CODES
PACKAGE SOP TUBE HCF40181BM1 T&R HCF40181M013TR
DESCRIPTION HCF40181B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in SOP packages. HCF40181B is a low-power 4-bit parallel arithmetic logic unit (ALU) capable of providing 16 binary arithmetic operations on two 4-bit words PIN CONNECTION
and 16 logical functions of two Boolean variables. The mode control input M selects logical (M = High) or arithmetic (M = Low) operations. The four select inputs (S0, S1, S2, and S3) select the desired logical or arithmetic functions, which include AND, OR, NAND, NOR, and exclusive-OR and NOR in the logical mode, and addition, subtraction, decrement, left-shift and straight transfer in the arithmetic mode, according to the truth table. HCF40181B operations may be interpreted with either active-low or active-high data at the A and B word inputs and the function outputs F, by using the appropriate truth table. HCF40181B contains logic for full look-ahead carry operations for fast carry generations using the carry-generate and carry propagate outputs G
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and P for the four bits of HCF40181B. Use of the HCF40182B look-ahead carry generator in conjunction with multiple HCF40181Bs permits high-speed arithmetic operations on long words. A ripple carry output Cn+4 is available for use in systems where speed is not of primary importance. Also included in HCF40181B is a comparator output A = B, which assumes a high level whenever the two four-bit input words A and INPUT EQUIVALENT CIRCUIT B are equal and the device is in subtract mode. In addition, relative magnitude information may be derived from the carry-in input Cn and ripple carry-out output Cn+4 by placing the unit in the subtract mode and externally decoding using the information in table II. HCF40181B is similar to industry types MC14581 and 74181.
PIN DESCRIPTION
PIN No 1, 22, 20, 18 2, 23, 21, 19 6, 5, 4, 3 9, 10, 11, 13 7 8 14 15 16 17 12 24 SYMBOL B0 A0 S0 F0 to B3 to A3 to S3 to F3 Cn M A=B P Cn+4 G VSS VDD NAME AND FUNCTION Word B Word A Function Select Inputs Output Function Carry Input Mode Control Compare Output Look Ahead Carry Outputs Ripple Carry Output Look Ahead Carry Outputs Negative Supply Voltage Positive Supply Voltage
FUNCTIONAL DIAGRAM
ACTIVE-LOW DATA ACTIVE-HIGH DATA
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LOGIC DIAGRAM (ACTIVE-LOW DATA)
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TRUTH TABLE 1
FUNCTION SELECT S3 L L L L L L L L H H H H H H H H S1 L L L L H H H H L L L L H H H H S2 S0 L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H INPUTS/OUTPUTS ACTIVE LOW Logic Function (M = H) A AB A+B Logic 1 A+B B A B A+B AB AB B A+B Logic 0 AB AB A Arithmetic* Function (M = L, Cn = L) A minus 1 AB minus 1 AB minus 1 minus 1 A plus (A + B) AB plus (A + B) A minus B minus 1 A+B A plus (A + B) A plus B AB plus (A + B) A+B A plus A AB plus A AB plus A A INPUTS/OUTPUTS ACTIVE HIGH Logic Function (M = H) A A+B AB Logic 0 AB B AB AB A+B A B B AB Logic 1 A+B A+B A Arithmetic* Function (M = L, Cn = H) A A+B A+B minus 1 A plus AB (A + B) plus AB A minus B minus 1 AB minus 1 A plus AB A plus B (A + B) plus AB AB minus 1 A plus A (A + B) plus A (A + B) plus A A minus 1
* : Expressed as two's complement. For arithmetic function with Cn in the opposite state, the resulting function is as show plus 1.
TRUTH TABLE 2: MAGNITUDE COMPARISON
ACTIVE-HIGH DATA INPUT Cn H L H L OUTPUT Cn + 4 H H L L MAGNITUDE AB AB AB INPUT Cn L H L H ACTIVE-LOW DATA OUTPUT Cn + 4 L L H H MAGNITUDE AB AB AB
TRUTH TABLE 3: AC TEST SETUP REFERENCE (ACTIVE-LOW DATA)
AC PATHS TEST DELAY TIMES INPUTS SUMIN to SUMOUT SUMIN to P SUMIN to G SUMIN to Cn + 4 Cn to SUMOUT Cn to Cn +4 SUMIN to A = B SUMIN to SUMOUT (logic mode) B0 A0 B0 B0 Cn Cn B0 All B,s OUTPUTS Any F P G Cn + 4 Any F Cn + 4 A=B Any F DC DATA INPUTS TO VSS B1, B2, B3, M, Cn A1, A2, A3, M, Cn All A's, M, Cn All A's, M, Cn All A's, M All A's, M All A's, B1, B2, B3, M All A's, Cn TO VDD All A's All B's B1, B2, B3 B1, B2, B3 All B's All B's Cn M ADD ADD ADD ADD ADD ADD SUBTRACT EXCLUSIVE OR MODE*
* ADD Mode: S0, S3 = VDD; S1, S2 = VSS. SUBTRACT Mode: S0, S3 = V SS; S1, S2 = V DD.
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ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V C
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DC SPECIFICATIONS
Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (A) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 18 TA = 25C Min. Typ. 0.04 0.04 0.04 0.08 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -1.36 -0.44 -1.1 -3.0 0.44 1.1 3.0 -3.2 -1 -2.6 -6.8 1 2.6 6.8 10-5 10-4 5 -1.1 -0.36 -0.9 -2.4 0.36 0.9 2.4 3.5 7 11 1.5 3 4 -1.1 -0.36 -0.9 -2.4 0.36 0.9 2.4 Max. 5 10 20 100 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 Value -40 to 85C Min. Max. 150 300 600 3000 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125C Min. Max. 150 300 600 3000 Unit
IL
Quiescent Current
A
VOH
High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current
VOL
VIH
VIL
IOH
IOL
Output Sink Current Input Leakage Current 3-State Output Leakage Current Input Capacitance
0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18 0/18
<1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1
V
V
V
V
mA
mA
II
Any Input Any Input Any Input
0.1 0.4
7.5
1 12
1 12
A A
pF
IOZ CI
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
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DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25C, CL = 50pF, RL = 200K, tr = tf = 20 ns)
Test Condition Symbol Parameter VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 Min. Value (*) Typ. 400 160 120 500 200 140 320 135 100 200 100 70 100 50 40 Max. 800 320 240 1000 400 280 640 270 200 400 200 140 200 100 80 ns Unit
tPHL tPLH Propagation Delay Time A or B to F (logic mode) A or B to G or P A or B to F, Cn+4, or A = B Cn to F
ns
ns
Cn to Cn+4
ns
tTHL tTLH Transition Time
ns
(*) Typical temperature coefficient for all VDD value is 0.3 %/C (1) : If more than one unit is cascaded. tr should be made less than or equal to the sum of the transition time and the fixed propagation delay of the output of the driving stage for the estimated capacitive load.
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50)
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WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
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SO-24 MECHANICAL DATA
mm. DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F L S 7.40 0.50 15.20 10.00 1.27 13.97 7.60 1.27 8 (max.) 0.291 0.020 15.60 10.65 0.35 0.23 0.5 45 (typ.) 0.598 0.393 0.050 0.550 0.300 0.050 0.614 0.419 0.1 TYP MAX. 2.65 0.2 2.45 0.49 0.32 0.014 0.009 0.020 0.004 MIN. TYP. MAX. 0.104 0.008 0.096 0.019 0.012 inch
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e3 D
E
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13
1
1
2
F
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PO13T
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A
C
c1
HCF40181B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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